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Resume


Following is my resume. You may also download it as a PDF

Navid Azizi

5 Montgomery Court
Markham, Ontario, Canada L3R 0C4
Phone: (905) 947-1952
E-mail: mye-mail address


Education

Jan. '03 - Current University of Toronto Toronto, Ontario
Ph.D. in Electronics
  • Ph.D. Thesis: Challenges in Nanometre Digital Integrated Circuit Design
  • Includes work on reducing leakage in SRAM and FPGA structures, reducing the SER in memories, analyzing the effects (delay, leakage) of process variations on circuits, and using circuit techniques to reduce the effect of variations.

Sept. '01 - Oct. '02 University of Toronto Toronto, Ontario
Master of Applied Science in Electronics
Sept. '98 - May '01 University of Toronto Toronto, Ontario
Bachelor of Computer Engineering
  • Completed 4th year with a CGPA of 3.95.
  • Ranked 1st overall in program.
Sept. '97 - May '98 McGill University Montréal, Québec
Bachelor of Computer Engineering
  • Completed first year with 3.97 CGPA
Aug. '95 - May '97 CEGEP Marianopolis Montréal, Québec
Health Sciences Degree
  • Completed two year pre-university degree with an average of 92%

Publications

A Soft-Error Tolerant Content-Addressable Memory (CAM) Using An Error-Correcting-Match Scheme, Kostas Pagiamtzis, Navid Azizi, and Farid N. Najm, IEEE Custom Integrated Circuits Conference (CICC), September 2006.

A Family of Cells to Reduce the Soft-Error-Rate in Ternary-CAM, Navid Azizi and Farid N. Najm, ACM/IEEE Design Automation Conference (DAC), July 2006.

An Adaptive FPGA Architecture with Process Variation Compensation and Reduced Leakage,Georges Nabaa, Navid Azizi and Farid N. Najm, ACM/IEEE Design Automation Conference (DAC), July 2006.

Look-Up Table Leakage Reduction for FPGAs, Navid Azizi and Farid N. Najm, IEEE Custom Integrated Circuits Conference (CICC), September 2005.

A Case for Asymmetric-Cell Cache Memories, Andreas Moshovos, Babak Falsafi, Farid N. Najm and Navid Azizi, IEEE Transactions on VLSI (TVLSI), July 2005.

Compensation for Within-Die Variations in Dynamic Logic by using Body-Bias, Navid Azizi, and Farid N. Najm, IEEE Northeast Workshop on Circuits and Systems (NEWCAS), June 2005.

Variations Aware Low-Power Design with Voltage Scaling, Navid Azizi, Muhammad M. Khellah, Vivek De and Farid N. Najm, ACM/IEEE Design Automation Conference (DAC), June 2005.

Reconfigurable Molecular Dynamics Simulator, Navid Azizi, Ian Kuon, Aaron Egier, Ahmad Daribiha, Paul Chow, IEEE Intl. Symposium on Field-Programmable Custom Computing Machines (FCCM), April 2004.

An Asymmetric SRAM cell to Lower Gate Leakage, Navid Azizi, Farid N. Najm, IEEE Intl. Symposium on Quality Electronic Design (ISQED), March 2004.

FPGA-Based Supercomputing: An Implementation for Molecular Dynamics, Ian Kuon, Navid Azizi, Ahmad Darabiha, Aaron Egier and Paul Chow, Poster, ACM Symposium on Field Programmable Gate Arrays (FGPA), Feb. 2004.

Low-Leakage Asymmetric-Cell SRAM, Navid Azizi, Farid N. Najm and Andreas Moshovos, IEEE Transactions on VLSI (TVLSI), Aug. 2003.

Low-Leakage Asymmetric-Cell SRAM, Navid Azizi, Andreas Moshovos and Farid N. Najm, ACM/IEEE Intl. Symposium on Low Power Electronic Devices (ISLPED), Aug. 2002.

Exploiting Bit Value Bias to Reduce Leakage in Deep Submicron High-Performance Caches, Navid Azizi, Andreas Moshovos, Farid N. Najm and Babak Falsafi, Technical Report, Computer Group, ECE, Univ. of Toronto, Feb. 2002.

Work Experience

Jan. '02 - Dec. '06 University of Toronto Toronto, Ontario
Head Teaching Assistant
  • Head TA for ECE451, VLSI Systems (fourth year class) for 150-200 students
  • Developed lab material, provided support for lab design activities
June '05 - Sept. '04 Intel Hillsboro, Oregon
Electronics Engineer
  • Worked on compensation of process varaitions at very low voltages
May '04 - Aug. '04 Intel Hillsboro, Oregon
Electronics Engineer
  • Worked on Low-Voltage techniques in the precence of process variations.
July '02 - Aug. '02 Texas Instruments Dallas, Texas
Electronics Engineer
  • Tested asymmetrical SRAM designs in various processes
May '00-Aug. '01 Altera Canada Inc. Toronto, Ontario
Software Engineer
  • Designed a portion of the fitter to hierarchically size regions within a design and to initially place them.
  • Worked on project to implement incremental compile, and a modular design flow in existing Altera software tools.
May '99 - Sept. '99 CIBC Mortgages Inc Toronto, Ontario
Internet Developer
  • Reconstructed the CIBC Mortgages Intranet
  • Head developer of FirstLine Mortgages website
May '96 - Aug. '98 IBM Canada Ltd. Bromont, Québec
Summer Student
  • '98: Development of an automated wirebonder verification program in C. The program eliminating manual wirebonder verification. (approx savings: $1 million/year) Developed a course in AutoOLP (Off-line wirebonder program generation) and AutoCAD and trained 15+ engineers.
  • '97: RAM manufacturing facility; delamination tests and inspection by sound waves (Sonoscan).
  • '96: Equipment set-up and plastic moulding of memory modules.
June '96 - Aug. '96 Hotel-Dieu Research Centre Montréal, Québec
Summer Student
  • Research work for the diagnosis of genes causing breast and ovarian cancer
June '95 - Aug. '95 Barcana Canada Ltd.  Granby, Québec
Summer Student
 
  • Establishment and revision of bill of materials
  • Production planning and scheduling

Volunteer Experience

Sept. '96 - May '97 Montreal General Hospital Montréal, Québec
CAT Scan Volunteer

Awards Received

SRC Inventor Recognition Award in 2005

SRC Inventor Recognition Award in 2003

NSERC CGS Scholarship in 2003

NSERC PGS Scholarship in 2001

Recipient of a University of Toronto Scholar Scholarship in 2000

Recipient of a Solutions Excellence award from IBM Canada for development and implementation of the Wirebonder verification program

Recipient of a University of Toronto Transfer Student Entrance Scholarship

Recipient of the H.M. MacKay Memorial Scholarship and J.W McConnel Award for high academic achievement (top 5%) from McGill University

Graduated as a Marianopolis Scholar from Marianopolis College for high academic achievement (above 90% average)

Recipient of the Prestigious Governor General's Bronze Medal in 1995 for being the top graduating student from high school

Recipient of 9 scholarships and prizes including the IBM Canada Ltd. Scholarship; Massey-Vanier Staff and District of Bedford Commissioners Scholarships; Math, Physics and Chemistry Prizes

First prize winner in the Applied Sciences category at the Regional Science Fair in 1995 presented by the Univesité de Montreal's Ecole Polytechnique for Water Purification by Ozone

Languages

I speak fluently in three languages: English, French and Persian.  I also read and write in English and French.

Computer Knowledge

CAD Tools: Experienced using SPICE, Cadence, Synopsys, Synplicity, Altera tools, Xilinx tools

Computer Systems: Experienced in Solaris, AIX, Linux, Windows NT, OS/2s

Computer Languages: Experienced in JAVA, C, C++, LISP, Python, and AWK

Computer Programs: Experienced in Lotus Notes, Microsoft Office,  Lotus SmartSuite, Adobe Photoshop, AutoCAD,

Interests and Activities

Chair of University of Toronto Campus Association of Baha'i Studies

Co-chair of Cider Series of Graduate Student Seminar

Member of the 4-member taskforce that organized the 350 attendee "Unravel the Mysteries" conference in Mississauga in May 2004.

Teach grade 9 class at the Brilliant Stars Baha'i School in Markham.

Elected as Electrical and Computer Engineering Class Representative during 4th year.

Organized the Markham Unity in Diversity Week Event during November 1999. The event included performances, speakers, and international cuisine. Notable invitees included the Mayor of Markham and many councillors.

Coordinator of the Marianopolis Robotics Team during the 1997 Canada First Robotics Competition.  I was also involved in my colleges environmental club.

Play the Piano and Clarinet for over 7 years.

Play Tennis and Soccer.


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